1. Field of the Invention
The present invention generally relates to caching operations in a processor, and particularly relates to determining cache policies.
2. Relevant Background
Processor performance is improved by including one or more levels of cache locally in a processor for storing frequently accessed or most recently used information. A processor cache is a small, fast memory which stores a copy of select information stored in main memory such as DRAM or a hard-disk drive. When an instruction accesses a memory location, the processor first checks whether the memory location is replicated in a local cache. Particularly, the address associated with the memory access is compared to all tags in a cache. If the desired memory is located in the cache, a cache hit occurs. Otherwise, a cache miss occurs.
When a cache hit occurs, the processor immediately reads or writes the information such as data or instructions in the identified cache line. In the event of a cache miss, the desired information is retrieved from a higher-level cache or main memory. Also, a new entry is conventionally allocated in the cache to store the newly retrieved information. The new entry comprises a tag identifying the address that caused the cache miss and a copy of the information retrieved from main memory.
To accommodate a new cache entry, an existing entry is evicted from the cache. The heuristic used to choose the entry to evict from a cache is based on a replacement policy such as least recently used or first-in, first-out. Other cache policies (also referred to as cache attributes) are also utilized to determine how a cache is accessed, used and maintained. Other cache policies include write policies, allocation policies, cache level policies, and customized policies.
Write policies determine when information written to a cache block is also written to main memory. For example, cache and main memory are updated at the same time when a write-through policy is used. When a write-back policy is employed, main memory is updated only when the corresponding cache block is replaced. A write-once policy uses a write-through policy for the first write to a particular cache block and a write-back policy for subsequent writes to the same block.
A cache allocation policy determines when a cache block is written. For example, if the allocation policy associated with a particular cache block is “allocate on read only”, the block is not disturbed during writes. To the contrary, the cache block is updated during both writes and reads when the allocation policy is “allocate on read and write”. For processors having multiple levels of caches such as first-level instruction and data caches and at least one higher level cache, a cache level policy determines which level of cache is used to store information. For example, instructions may be stored in a first-level instruction cache while other information may be stored only in a second level cache.
Cache policies are conventionally stored in a page table. The page table is maintained in main memory with frequently accessed or most recently used entries being stored locally to a processor, e.g., in a Translation Lookaside Buffer (TLB). Each page table entry maps a virtual address to a corresponding physical address. Particularly, a page table stores a list of virtual page numbers and corresponding physical page numbers. The virtual page numbers identify respective blocks of virtual memory allocated to processes running on a processor while the physical page numbers identify the corresponding blocks of physical memory containing the actual information used by the processes.
When a processor accesses a particular memory location, page table entries are searched using the virtual page number portion of the virtual address provided as part of the access. The physical page number is retrieved from the matching page table entry. The physical page number and page offset form a physical address which is used to access the desired memory location.
If the desired memory location is not contained within a local processor cache, main memory is accessed. Cache policy information stored in the matching page table entry determines whether information read from or written to main memory as part of the memory access is stored locally in the cache, and if so, how the information is maintained in the cache. Thus, cache policies are conventionally set and applied to a cache on a per-page (or per block) basis. Further, cache policies are conventionally programmed by the operating system. As such, cache policies are applied generally to all processes running on a processor and may result in inefficiencies when utilized by a particular type of main memory device. For example, an “allocate on read only” cache allocation policy may optimize cache utilization for some processes such as graphics applications, but not others.